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Espressif Systems /ESP32 /EMAC_EXT /EX_OSCCLK_CONF

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Interpret as EX_OSCCLK_CONF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DIV_NUM_10M0H_DIV_NUM_10M 0DIV_NUM_100M0H_DIV_NUM_100M 0 (CLK_SEL)CLK_SEL

Description

RMII clock half and whole divider settings

Fields

DIV_NUM_10M
H_DIV_NUM_10M
DIV_NUM_100M
H_DIV_NUM_100M
CLK_SEL

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data